Verification of Stack Manipulation in the SCIP Processor
نویسنده
چکیده
This paper presents a case study in the formal verification of the hardware description level specification of a general purpose computer processor. The major contributions of this paper are a framework for modelling VHDL hardware designs in the ACL2 language, a discipline for managing the layering of abstractions when verifying a hierarchical design, and a description of the significant theorems proved.
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تاریخ انتشار 2010